From 022388963bbbcba623868b9c47ab378003796c97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fran=C3=A7ois=20Autin?= Date: Wed, 11 Jan 2023 15:04:54 +0100 Subject: [PATCH] Fixed clippy errors --- src/machine.rs | 52 +++++++++++++++++++++++++------------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/src/machine.rs b/src/machine.rs index 2453d23..59da0ef 100644 --- a/src/machine.rs +++ b/src/machine.rs @@ -22,8 +22,8 @@ impl Machine { let mut value : u64 = 0xffffffff; value = (value << 32) + value; - for i in 0..64 { - shiftmask[i] = value; + for item in &mut shiftmask { + *item = value; value = value >> 1; } @@ -32,7 +32,7 @@ impl Machine { instructions : [0 ; 100], int_reg : [0 ; 32], main_memory : [0 ; MEM_SIZE], - shiftmask : shiftmask + shiftmask } } @@ -50,18 +50,18 @@ impl Machine { let mut ret : u64 = machine.main_memory[address] as u64; if size == 2 || size == 4 || size == 8 { - ret = ret << 8; + ret <<= 8; ret += machine.main_memory[address + 1] as u64; } if size == 4 || size == 8 { - ret = ret << 8; + ret <<= 8; ret += machine.main_memory[address + 2] as u64; } if size == 8 { - ret = ret << 8; + ret <<= 8; ret += machine.main_memory[address + 3] as u64; } - return ret; + ret } /// Execute the instructions table of a machine putted in param @@ -83,14 +83,14 @@ impl Machine { /// - **machine** which contains a table of instructions and a pc to the actual instruction pub fn one_instruction(machine :&mut Machine) { - let mut unsigned_reg1 : u64 = 0; - let mut unsigned_reg2 : u64 = 0; - let mut long_result : i128 = 0; + let unsigned_reg1 : u64; + let unsigned_reg2 : u64; + let long_result : i128; /*__int128 longResult; - int32_t localDataa, localDatab; + int32_t local_data_a, local_data_b; int64_t localLongResult; - uint32_t localDataaUnsigned, localDatabUnsigned; + uint32_t local_data_aUnsigned, local_data_bUnsigned; int32_t localResult; float localFloat; uint64_t value;*/ @@ -134,22 +134,22 @@ impl Machine { machine.pc += inst.imm13_signed as u64 - 4; } }, - RICV_BR_BLT => { + RISCV_BR_BLT => { if machine.int_reg[inst.rs1 as usize] < machine.int_reg[inst.rs2 as usize] { machine.pc += inst.imm13_signed as u64 - 4; } }, - RICV_BR_BGE => { + RISCV_BR_BGE => { if machine.int_reg[inst.rs1 as usize] >= machine.int_reg[inst.rs2 as usize] { machine.pc += inst.imm13_signed as u64 - 4; } }, - RICV_BR_BLTU => { + RISCV_BR_BLTU => { if machine.int_reg[inst.rs1 as usize] < machine.int_reg[inst.rs2 as usize] { machine.pc += inst.imm13_signed as u64 - 4; } }, - RICV_BR_BGEU => { + RISCV_BR_BGEU => { if machine.int_reg[inst.rs1 as usize] >= machine.int_reg[inst.rs2 as usize] { machine.pc += inst.imm13_signed as u64 - 4; } @@ -266,7 +266,7 @@ impl Machine { } else { match inst.funct3 { RISCV_OP_ADD => { - if (inst.funct7 == RISCV_OP_ADD_ADD) { + if inst.funct7 == RISCV_OP_ADD_ADD { machine.int_reg[inst.rd as usize] = machine.int_reg[inst.rs1 as usize] + machine.int_reg[inst.rs2 as usize]; } else { machine.int_reg[inst.rd as usize] = machine.int_reg[inst.rs1 as usize] - machine.int_reg[inst.rs2 as usize]; @@ -314,27 +314,27 @@ impl Machine { // Treatment for: OPW INSTRUCTIONS RISCV_OPW => { if inst.funct7 == 1 { - let localDataa = machine.int_reg[inst.rs1 as usize] & 0xffffffff; - let localDatab = machine.int_reg[inst.rs2 as usize] & 0xffffffff; - let localDataaUnsigned = machine.int_reg[inst.rs1 as usize] & 0xffffffff; - let localDatabUnsigned = machine.int_reg[inst.rs2 as usize] & 0xffffffff; + let local_data_a = machine.int_reg[inst.rs1 as usize] & 0xffffffff; + let local_data_b = machine.int_reg[inst.rs2 as usize] & 0xffffffff; + let local_data_a_unsigned = machine.int_reg[inst.rs1 as usize] & 0xffffffff; + let local_data_b_unsigned = machine.int_reg[inst.rs2 as usize] & 0xffffffff; // Match case for multiplication operations (in standard extension RV32M) match inst.funct3 { RISCV_OPW_M_MULW => { - machine.int_reg[inst.rd as usize] = localDataa * localDatab; + machine.int_reg[inst.rd as usize] = local_data_a * local_data_b; }, RISCV_OPW_M_DIVW => { - machine.int_reg[inst.rd as usize] = localDataa / localDatab; + machine.int_reg[inst.rd as usize] = local_data_a / local_data_b; }, RISCV_OPW_M_DIVUW => { - machine.int_reg[inst.rd as usize] = localDataaUnsigned / localDatabUnsigned; + machine.int_reg[inst.rd as usize] = local_data_a_unsigned / local_data_b_unsigned; }, RISCV_OPW_M_REMW => { - machine.int_reg[inst.rd as usize] = localDataa % localDatab; + machine.int_reg[inst.rd as usize] = local_data_a % local_data_b; }, RISCV_OPW_M_REMUW => { - machine.int_reg[inst.rd as usize] = localDataaUnsigned % localDatabUnsigned; + machine.int_reg[inst.rd as usize] = local_data_a_unsigned % local_data_b_unsigned; }, _ => { println!("this instruction ({}) doesn't exists", inst.value);