Fixed JAL
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4d2e92021c
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32a08caec2
@ -74,11 +74,7 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
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format!("auipc\t{}, {:X}", REG_X[rd], ins.imm31_12)
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},
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RISCV_JAL => {
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if ins.rd == 0 {
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format!("j\t{}", ins.imm31_12)
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} else {
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format!("jal\t{}, {:X}", REG_X[rd], (pc - 4 + ins.imm21_1_signed))
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}
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format!("jal\t{},{:X}", REG_X[rd], (pc + ins.imm21_1_signed))
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},
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RISCV_JALR => {
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format!("jalr\t{},{}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
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@ -263,7 +259,7 @@ mod test {
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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//assert_eq!("mulw a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));
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//Waiting for mulw implementation assert_eq!("mulw a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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@ -283,4 +279,11 @@ mod test {
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}
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#[test]
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fn test_fibo() {
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assert_eq!("jal zero,10504", print::print(decode::decode(0x0500006f), 0x104b4));
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//assert_eq!("blt a4,a5,104b8", print::print(decode::decode(0xfaf740e3), 0x10518));
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}
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}
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