Added a test on a small program and removed unnecessary spaces
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@ -13,7 +13,7 @@ const NAMES_OPW: [&str; 8] = ["addw", "sllw", "", "", "", "srw", "", ""];
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const NAMES_OPIW: [&str; 8] = ["addiw", "slliw", "", "", "", "sri", "", ""];
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const NAMES_OPIW: [&str; 8] = ["addiw", "slliw", "", "", "", "sri", "", ""];
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// Register name mapping
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// Register name mapping
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const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "fp", "s1", // fp ou s0 ?
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const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", // fp ou s0 ?
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"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
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"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
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"s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
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"s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
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"t3", "t4", "t5", "t6"];
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"t3", "t4", "t5", "t6"];
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@ -81,15 +81,7 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
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}
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}
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},
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},
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RISCV_JALR => {
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RISCV_JALR => {
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if ins.rd == 0 {
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format!("jalr\t{},{}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
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if ins.rs1 == 1 {
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"ret".to_string()
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} else {
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format!("jr\t{:X}", ins.imm31_12)
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}
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} else {
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format!("jalr\t{}, ({})", ins.imm12_I_signed, REG_X[rs1])
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}
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},
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},
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RISCV_BR => {
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RISCV_BR => {
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format!("{}\t{}, {}, {}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], ins.imm13_signed)
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format!("{}\t{}, {}, {}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], ins.imm13_signed)
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@ -250,4 +242,45 @@ mod test {
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assert_eq!("beq\ta7, a6, 0", print::print(beq, 0));
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assert_eq!("beq\ta7, a6, 0", print::print(beq, 0));
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}
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}
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#[test]
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fn test_small_program() {
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/* Code for :
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int a = 0;
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int b = 5;
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a = b;
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a = a * b;
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a = a + b;
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b = a - b;
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*/
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assert_eq!("addi sp,sp,-32", print::print(decode::decode(0xfe010113), 0));
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assert_eq!("sd s0,24(sp)", print::print(decode::decode(0x00813c23), 0));
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assert_eq!("addi s0,sp,32", print::print(decode::decode(0x02010413), 0));
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assert_eq!("sw zero,-20(s0)", print::print(decode::decode(0xfe042623), 0));
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assert_eq!("addi a5,zero,5", print::print(decode::decode(0x00500793), 0));
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assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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//assert_eq!("mulw a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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assert_eq!("addw a5,a4,a5", print::print(decode::decode(0x00f707bb), 0));
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assert_eq!("sw a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));
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assert_eq!("lw a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));
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assert_eq!("addi a4,a5,0", print::print(decode::decode(0x00078713), 0));
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assert_eq!("lw a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));
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assert_eq!("subw a5,a4,a5", print::print(decode::decode(0x40f707bb), 0));
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assert_eq!("sw a5,-24(s0)", print::print(decode::decode(0xfef42423), 0));
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assert_eq!("addi a5,zero,0", print::print(decode::decode(0x00000793), 0));
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assert_eq!("addi a0,a5,0", print::print(decode::decode(0x00078513), 0));
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assert_eq!("ld s0,24(sp)", print::print(decode::decode(0x01813403), 0));
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assert_eq!("addi sp,sp,32", print::print(decode::decode(0x02010113), 0));
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assert_eq!("jalr zero,0(ra)", print::print(decode::decode(0x00008067), 0));
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}
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}
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}
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