parent
72b2a105f0
commit
5ad42a7073
@ -139,9 +139,10 @@ impl Machine {
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/// ### Parameters
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///
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/// - **machine** which contains a table of instructions
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pub fn run(&mut self){
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loop {
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self.one_instruction();
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pub fn run(machine : Machine){
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let mut m = machine;
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loop{
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Machine::one_instruction(&mut m);
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}
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}
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@ -150,8 +151,8 @@ impl Machine {
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/// ### Parameters
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///
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/// - **machine** which contains a table of instructions and a pc to the actual instruction
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pub fn one_instruction(&mut self) {
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let mut machine = self;
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pub fn one_instruction(machine :&mut Machine) {
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let unsigned_reg1 : u64;
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let unsigned_reg2 : u64;
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let long_result : i128;
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@ -465,21 +466,11 @@ impl Machine {
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#[cfg(test)]
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mod test {
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use crate::simulator::{machine::Machine, decode};
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fn init() -> Machine {
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let mut m = Machine::_init_machine();
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m.main_memory[0] = 255;
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m.main_memory[1] = 43;
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m.main_memory[2] = 7;
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m.main_memory[3] = 157;
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m
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}
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use crate::simulator::machine::Machine;
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#[test]
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fn test_read_memory() {
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let mut m = init();
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let mut m = Machine::_init_machine();
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m.main_memory[4] = 43;
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m.main_memory[5] = 150;
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assert_eq!((43 << 8) + 150, Machine::read_memory(&mut m, 2, 4));
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@ -487,50 +478,9 @@ impl Machine {
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#[test]
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fn test_write_memory() {
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let mut m = init();
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let mut m = Machine::_init_machine();
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Machine::write_memory(&mut m, 2, 6, (43 << 8) + 150);
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assert_eq!(43, m.main_memory[6]);
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assert_eq!(150, m.main_memory[7]);
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}
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#[test]
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fn test_op_add() {
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let mut m = init();
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m.int_reg[6] = 5; // t1
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m.instructions[0] = 0b0000000_00110_00000_000_00101_0110011;
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// add t0, zero, t1
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m.one_instruction();
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assert_eq!(m.int_reg[5], 5);
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}
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#[test]
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fn test_op_sub() {
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let mut m = init();
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m.int_reg[6] = 5; // t1
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m.instructions[0] = 0b0100000_00110_00000_000_00101_0110011;
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// sub t0, zero, t1
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m.one_instruction();
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assert_eq!(m.int_reg[5], -5);
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}
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#[test]
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fn test_op_addi() {
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let mut m = init();
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m.int_reg[6] = 5; // t1
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m.instructions[0] = 0b11111111111_00110_000_00101_0010011;
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// add t0, t1, 2047
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m.one_instruction();
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assert_eq!(m.int_reg[5], 2052);
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}
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/// Equivalent of subi
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#[test]
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fn test_op_addi_neg() {
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let mut m = init();
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m.int_reg[6] = -5; // t1
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m.instructions[0] = 0b11111111111_00110_000_00101_0010011;
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// addi t0, t1, 2047
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m.one_instruction();
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assert_eq!(m.int_reg[5], 2042);
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}
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}
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