memory.txt can be execute

This commit is contained in:
Baptiste 2023-03-05 23:49:28 +01:00
parent ea9c53e603
commit 6f6191ea3c
4 changed files with 23 additions and 10 deletions

View File

@ -8,7 +8,7 @@ fn main() {
let path = "memory.txt".to_string();
let checker = mem_cmp::Mem_Checker::from(&path);
mem_cmp::Mem_Checker::fill_memory_from_Mem_Checker(&checker, &mut m);
mem_cmp::Mem_Checker::print_Mem_Checker(&checker);
Machine::print_memory(&mut m, 0x400000, 0x405000);
//mem_cmp::Mem_Checker::print_Mem_Checker(&checker);
//Machine::print_memory(&mut m, 0x400000, 0x405000);
Machine::run(m);
}

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@ -1,5 +1,7 @@
use std::{ops::{Add, Sub}, io::Write};
use crate::simulator::print;
use super::{decode::{Instruction, decode}};
use super::global::*;
use std::fs::File;
@ -40,7 +42,7 @@ impl Register<i64> {
self.register[position] = value;
} else {
// Panic ou rien ? (dans le doute pour le moment panic)
unreachable!("You can't write to zero register")
// unreachable!("You can't write to zero register")
}
}
@ -148,6 +150,14 @@ impl Machine {
file.write(&machine.main_memory);
}
pub fn print_machine_status(machine: &mut Machine) {
println!("######### Machine status #########");
for i in 0..32 {
println!(">{} : {:x}", print::REG_X[i], machine.int_reg.get_reg(i));
}
println!("##################################");
}
/// Execute the instructions table of a machine putted in param
///
/// ### Parameters
@ -182,13 +192,15 @@ impl Machine {
if machine.main_memory.len() <= machine.pc as usize {
panic!("ERROR : number max of instructions rushed");
}
let mut val: [u8; 8] = [0; 8];
for i in 0..8 {
let mut val: [u8; 4] = [0; 4];
for i in 0..4 {
val[i] = machine.main_memory[machine.pc as usize + i];
}
let val = u64::from_be_bytes(val);
println!("{:x}", val);
let val = u32::from_be_bytes(val) as u64;
Self::print_machine_status(machine);
println!("executing instruction : {:016x} at pc {:x}", val, machine.pc);
println!("{}", print::print(decode(val), machine.pc as i32));
let inst : Instruction = decode(val);

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@ -160,6 +160,7 @@ impl Mem_Checker{
pub fn fill_memory_from_Mem_Checker(m_c: &Mem_Checker, machine: &mut Machine){
machine.sp = m_c.sp;
machine.int_reg.set_reg(2, m_c.pc as i64);
machine.pc = m_c.pc as u64;

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@ -13,7 +13,7 @@ const NAMES_OPIW: [&str; 8] = ["addiw", "slliw", "", "", "", "sri", "", ""];
// Register name mapping
const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1",
pub const REG_X: [&str; 32] = ["zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1",
"a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
"s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11",
"t3", "t4", "t5", "t6"];
@ -78,7 +78,7 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
format!("jal\t{},{:x}", REG_X[rd], (pc + ins.imm21_1_signed))
},
RISCV_JALR => {
format!("jalr\t{},{}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
format!("jalr\t{},{:x}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
},
RISCV_BR => {
format!("{}\t{},{},{:x}", NAMES_BR[ins.funct3 as usize], REG_X[rs1], REG_X[rs2], pc + (ins.imm13_signed as i32))