From 7a89d06f36da2b91d49214ea18fc69ec4b3459a1 Mon Sep 17 00:00:00 2001
From: Samy Solhi <samy.solhi@etudiant.univ-rennes1.fr>
Date: Wed, 9 Nov 2022 14:37:19 +0100
Subject: [PATCH] RISCV_OP fixed

---
 src/print.rs | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/src/print.rs b/src/print.rs
index 28bcb25..2f4d185 100644
--- a/src/print.rs
+++ b/src/print.rs
@@ -147,7 +147,23 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
             if ins.funct7 == 1 { // Use mul array
                 name = names_mul[ins.funct3 as usize]
             } else {
-                name = names_op[ins.funct3 as usize];
+                if ins.funct3 == RISCV_OP_ADD {
+                    // Add or Sub
+                    if ins.funct7 == RISCV_OP_ADD_ADD {
+                        name = "add";
+                    } else {
+                        name = "sub";
+                    }
+                } else if ins.funct3 == RISCV_OP_SR {
+                    // Srl or Sra
+                    if ins.funct7 == RISCV_OP_SR_SRL {
+                        name = "srl";
+                    } else {
+                        name = "sra";
+                    }
+                } else {
+                    name = names_op[ins.funct3 as usize];
+                }
             }
             format!("{} r{}, r{}, r{}", name.to_string(), &ins.rd.to_string(), &ins.rs1.to_string(), &ins.rs2.to_string())
         },