From 7be0c0accc367025908d5ab2747a5e7a8969f1c4 Mon Sep 17 00:00:00 2001 From: Quentin Legot Date: Tue, 9 May 2023 17:01:52 +0200 Subject: [PATCH] Add user_stack_size to Machine and use it for threads sp --- burritos.cfg | 2 +- src/kernel/exception.rs | 6 ++++-- src/kernel/thread_manager.rs | 14 ++++++++++++-- src/main.rs | 5 ++++- src/simulator/machine.rs | 21 ++++++++++++--------- src/simulator/mod.rs | 2 +- 6 files changed, 34 insertions(+), 16 deletions(-) diff --git a/burritos.cfg b/burritos.cfg index 6dedd7a..abf55f8 100755 --- a/burritos.cfg +++ b/burritos.cfg @@ -2,7 +2,7 @@ # BurritOS configuration file ################################################## -NumPhysPages = 400 +NumPhysPages = 40000000 UserStackSize = 4096 MaxFileNameSize = 256 NumDirEntries = 30 diff --git a/src/kernel/exception.rs b/src/kernel/exception.rs index 223827a..93f66ce 100644 --- a/src/kernel/exception.rs +++ b/src/kernel/exception.rs @@ -3,7 +3,7 @@ use std::{cell::RefCell, rc::Rc}; use crate::{simulator::{machine::{ExceptionType, Machine}, error::{MachineOk, MachineError}}}; use crate::kernel::synch::{Lock, Semaphore}; -use super::{system::{System, self}, thread::Thread}; +use super::{system::System, thread::Thread}; /// The halt system call. Stops Burritos. pub const SC_SHUTDOWN: u8 = 0; @@ -282,7 +282,9 @@ fn sc_new_thread(machine: &mut Machine, system: &mut System) -> Result u64 { + self.sp_max + } + + pub fn set_sp_max(&mut self, sp_max: u64) { + self.sp_max = sp_max; + } + } #[cfg(test)] diff --git a/src/main.rs b/src/main.rs index a481d44..370d1f2 100644 --- a/src/main.rs +++ b/src/main.rs @@ -55,7 +55,10 @@ fn main() { let owner1 = Process { num_thread: 0 }; let owner1 = Rc::new(RefCell::new(owner1)); - system.get_thread_manager().start_thread(Rc::clone(&thread_exec), owner1, loader.elf_header.entrypoint, ptr + machine.page_size, -1); + let sp_max = ptr + machine.user_stack_size; + system.get_thread_manager().set_sp_max(sp_max); + system.get_thread_manager().start_thread(Rc::clone(&thread_exec), owner1, loader.elf_header.entrypoint, sp_max, -1); + let to_run = system.get_thread_manager().find_next_to_run().unwrap(); system.get_thread_manager().switch_to(&mut machine, Rc::clone(&to_run)); diff --git a/src/simulator/machine.rs b/src/simulator/machine.rs index 5c87dea..67ac20c 100644 --- a/src/simulator/machine.rs +++ b/src/simulator/machine.rs @@ -96,6 +96,7 @@ pub struct Machine { //creer une struct cfg(configuration) qui s'initialise avec valeur dans un fichier cfg num_phy_page: u64, pub page_size: u64, + pub user_stack_size: u64, /// Current machine status pub status: MachineStatus } @@ -115,7 +116,8 @@ impl Machine { let num_phy_page = *settings.get(&MachineSettingKey::NumPhysPages).unwrap(); let page_size = *settings.get(&MachineSettingKey::PageSize).unwrap(); - let mem_size = (page_size*num_phy_page*100_000) as usize; + let user_stack_size = *settings.get(&MachineSettingKey::UserStackSize).unwrap(); + let mem_size = (page_size*num_phy_page) as usize; Machine { debug, @@ -129,7 +131,8 @@ impl Machine { registers_trace : String::from(""), status: MachineStatus::SystemMode, num_phy_page, - page_size + page_size, + user_stack_size } } @@ -425,10 +428,10 @@ impl Machine { RISCV_OPI_XORI => compute(&core::ops::BitXor::bitxor, rs1, imm12), RISCV_OPI_ORI => compute(&core::ops::BitOr::bitor, rs1, imm12), RISCV_OPI_ANDI => compute(&core::ops::BitAnd::bitand, rs1, imm12), - RISCV_OPI_SLLI => compute(&core::ops::Shl::shl, rs1, imm12), + RISCV_OPI_SLLI => compute(&core::ops::Shl::shl, rs1, shamt), RISCV_OPI_SRI => if inst.funct7_smaller == RISCV_OPI_SRI_SRLI { compute(&|a, b| { (a >> b) & self.shiftmask[inst.shamt as usize] as i64 }, rs1, shamt) - } else { + } else { // SRAI compute(&core::ops::Shr::shr, rs1, shamt) } _ => Err(format!("Unreachable in opi_instruction match! Instruction was {:?}", inst))? @@ -501,8 +504,8 @@ impl Machine { let local_data = self.int_reg.get_reg(inst.rs1); let result = match inst.funct3 { RISCV_OPIW_ADDIW => local_data + inst.imm12_I_signed as i64, - RISCV_OPIW_SLLIW => local_data << inst.shamt, - RISCV_OPIW_SRW => (local_data >> inst.shamt) & if inst.funct7 == RISCV_OPIW_SRW_SRLIW { self.shiftmask[32 + inst.shamt as usize] as i64 } else { 1 }, + RISCV_OPIW_SLLIW => local_data << inst.rs2, + RISCV_OPIW_SRW => (local_data >> inst.rs2) & if inst.funct7 == RISCV_OPIW_SRW_SRLIW { self.shiftmask[32 + inst.rs2 as usize] as i64 } else { 1 }, _ => Err(format!("Unreachable in op_instruction match! Instruction was {:?}", inst))? }; self.int_reg.set_reg(inst.rd, result); @@ -519,7 +522,7 @@ impl Machine { // Match case for multiplication operations (in standard extension RV32M) match inst.funct3 { - RISCV_OPW_M_MULW => self.int_reg.set_reg(inst.rd, local_data_a * local_data_b), + RISCV_OPW_M_MULW => self.int_reg.set_reg(inst.rd, (local_data_a * local_data_b) & 0xffffffff), RISCV_OPW_M_DIVW => self.int_reg.set_reg(inst.rd, local_data_a / local_data_b), RISCV_OPW_M_DIVUW => self.int_reg.set_reg(inst.rd, local_data_a_unsigned / local_data_b_unsigned), RISCV_OPW_M_REMW => self.int_reg.set_reg(inst.rd, local_data_a % local_data_b), @@ -538,9 +541,9 @@ impl Machine { }, RISCV_OPW_SLLW => self.int_reg.set_reg(inst.rd, local_dataa << (local_datab & 0x1f)), RISCV_OPW_SRW => if inst.funct7 == RISCV_OPW_SRW_SRLW { - self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab & 0x1f) & self.shiftmask[32 + local_datab as usize] as i64) + self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab /* & 0x1f */) & self.shiftmask[32 + local_datab as usize] as i64) } else { // SRAW - self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab & 0x1f)) + self.int_reg.set_reg(inst.rd, local_dataa >> (local_datab /* & 0x1f */)) }, _ => Err(format!("Unreachable in opw_instruction match! Instruction was {:?}", inst))? } diff --git a/src/simulator/mod.rs b/src/simulator/mod.rs index f764fbd..a0e55ba 100644 --- a/src/simulator/mod.rs +++ b/src/simulator/mod.rs @@ -214,7 +214,7 @@ pub mod global { /// /// Shift left logical immediate /// - /// `SLLI rd, rs1, shamt` => `rd <- rs1 >> shamt` + /// `SLLI rd, rs1, shamt` => `rd <- rs1 << shamt` pub const RISCV_OPI_SLLI: u8 = 0x1; /// Shift right immediate, may be SRAI or SRLI pub const RISCV_OPI_SRI: u8 = 0x5;