François Autin 2d241e4dd5

♻️ Started refactoring instruction.rs

2023-03-29 16:26:27 +02:00

..

error.rs

♻️ Error cleanup

2023-03-28 19:37:31 +02:00

instruction.rs

♻️ Started refactoring instruction.rs

2023-03-29 16:26:27 +02:00

interrupt.rs

use of system in parameters in synch

2023-03-15 11:09:34 +01:00

loader.rs

Renamed Machine::init_machine and fixed stack overflow by allocating main_memory to the heap

2023-03-11 23:49:20 +01:00

machine.rs

♻️ Started refactoring instruction.rs

2023-03-29 16:26:27 +02:00

mem_cmp.rs

oups sorry les boys

2023-03-15 15:48:58 +01:00

mmu.rs

Renamed exceptions to follow CamlCase convention

2023-03-23 20:54:05 +01:00

mod.rs

♻️ Consolidated instruction definition and manipulation in instruction.rs

2023-03-29 16:08:06 +02:00

register.rs

📝 Commented trait RegisterNum

2023-03-29 15:40:35 +02:00

translationtable.rs

impl translation table + debut impl mmu

2023-03-13 22:52:27 +01:00